[RHEL7,COMMIT] ms/x86/CPU: Add Icelake model number

Submitted by Konstantin Khorenko on Oct. 3, 2019, 3:38 p.m.


Message ID 201910031538.x93FcApW011014@finist-ce7.sw.ru
State New
Series "ms/x86/CPU: Add Icelake model number"
Headers show

Commit Message

Konstantin Khorenko Oct. 3, 2019, 3:38 p.m.
The commit is pushed to "branch-rh7-3.10.0-957.27.2.vz7.107.x-ovz" and will appear at https://src.openvz.org/scm/ovz/vzkernel.git
after rh7-3.10.0-957.27.2.vz7.107.13
commit 555a38481f42a4a76755bea7b0c655caa375a161
Author: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
Date:   Thu Oct 3 18:38:10 2019 +0300

    ms/x86/CPU: Add Icelake model number
    Add the CPUID model number of Icelake (ICL) mobile processors to the
    Intel family list. Icelake U/Y series uses model number 0x7E.
    Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@linux.intel.com>
    Signed-off-by: Borislav Petkov <bp@suse.de>
    Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
    Cc: Dave Hansen <dave.hansen@linux.intel.com>
    Cc: "David E. Box" <david.e.box@intel.com>
    Cc: dvhart@infradead.org
    Cc: "H. Peter Anvin" <hpa@zytor.com>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: Kan Liang <kan.liang@linux.intel.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: platform-driver-x86@vger.kernel.org
    Cc: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
    Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: x86-ml <x86@kernel.org>
    Link: https://lkml.kernel.org/r/20190214115712.19642-2-rajneesh.bhardwaj@linux.intel.com
    (cherry picked from commit 8cd8f0ce0d6aafe661cb3d6781c8b82bc696c04d)
    Signed-off-by: Jan Dakinevich <jan.dakinevich@virtuozzo.com>
 arch/x86/include/asm/intel-family.h | 2 ++
 1 file changed, 2 insertions(+)

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diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index bcf3dfb45f24..4ea00dc3c883 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -51,6 +51,8 @@ 
 /* "Small Core" Processors (Atom) */
 #define INTEL_FAM6_ATOM_BONNELL		0x1C /* Diamondville, Pineview */