[rh7] ms/KVM: x86: reinstate vendor-agnostic check on SPEC_CTRL cpuid bits #PSBM-120787 #PSBM-123538 #PSBM-121767

Submitted by Konstantin Khorenko on Dec. 8, 2020, 11:03 a.m.

Details

Message ID 20201208110305.24050-1-khorenko@virtuozzo.com
State New
Series "ms/KVM: x86: reinstate vendor-agnostic check on SPEC_CTRL cpuid bits #PSBM-120787 #PSBM-123538 #PSBM-121767"
Headers show

Commit Message

Konstantin Khorenko Dec. 8, 2020, 11:03 a.m.
From: Paolo Bonzini <pbonzini@redhat.com>

Until commit e7c587da1252 ("x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP",
2018-05-17), KVM was testing both Intel and AMD CPUID bits before allowing the
guest to write MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD.  Testing only Intel bits
on VMX processors, or only AMD bits on SVM processors, fails if the guests are
created with the "opposite" vendor as the host.

While at it, also tweak the host CPU check to use the vendor-agnostic feature bit
X86_FEATURE_IBPB, since we only care about the availability of the MSR on the host
here and not about specific CPUID bits.

mFixes: e7c587da1252 ("x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP")
Cc: stable@vger.kernel.org
Reported-by: Denis V. Lunev <den@openvz.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

https://jira.sw.ru/browse/PSBM-123538

Patch hide | download patch | download mbox

========================================
The patch is a replacement for below vz patch,
which has been reverted due to
https://jira.sw.ru/browse/PSBM-121767

 commit 39d637ddbcf876f897e01c737bbb351461921df0
 Author: Denis V. Lunev <den@openvz.org>
 Date:   Wed Oct 28 19:25:57 2020 +0300

    kvm: fix AMD IBRS/IBPB/STIBP/SSBD reporting #PSBM-120787

    We should report these bits in 80000008 EBX on AMD only, i.e. when AMD
    specific feature bits are enabled.

    https://jira.sw.ru/browse/PSBM-120787

    Signed-off-by: Denis V. Lunev <den@openvz.org>
    CC: Vasily Averin <vvs@virtuozzo.com>
    CC: Konstantin Khorenko <khorenko@virtuozzo.com>
========================================

Port to vz7 note:

in vz7 both functions svm_set_msr() and vmx_set_msr() did not have
checks for
  !boot_cpu_has(X86_FEATURE_AMD_IBPB)
and
  !boot_cpu_has(X86_FEATURE_SPEC_CTRL)

Signed-off-by: Konstantin Khorenko <khorenko@virtuozzo.com>
---
 arch/x86/kvm/svm.c |  3 +++
 arch/x86/kvm/vmx.c | 10 ++++++++--
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 5715da241383..3a04bd0bdf09 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3881,11 +3881,14 @@  static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
 		break;
 	case MSR_IA32_PRED_CMD:
 		if (!msr->host_initiated &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
 		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBPB))
 			return 1;
 
 		if (data & ~PRED_CMD_IBPB)
 			return 1;
+		if (!boot_cpu_has(X86_FEATURE_IBPB))
+			return 1;
 
 		if (!data)
 			break;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f43b2db71ea9..a120208d3496 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3350,7 +3350,10 @@  static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		break;
 	case MSR_IA32_SPEC_CTRL:
 		if (!msr_info->host_initiated &&
-		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_STIBP) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBRS) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_SSBD))
 			return 1;
 
 		/* The STIBP bit doesn't fault even if it's not advertised */
@@ -3387,11 +3390,14 @@  static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		goto find_shared_msr;
 	case MSR_IA32_PRED_CMD:
 		if (!msr_info->host_initiated &&
-		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL))
+		    !guest_cpuid_has(vcpu, X86_FEATURE_SPEC_CTRL) &&
+		    !guest_cpuid_has(vcpu, X86_FEATURE_AMD_IBPB))
 			return 1;
 
 		if (data & ~PRED_CMD_IBPB)
 			return 1;
+		if (!boot_cpu_has(X86_FEATURE_IBPB))
+			return 1;
 
 		if (!data)
 			break;