[4/4] s390: Add test for GS and RI

Submitted by alice on Sept. 28, 2017, 11:50 a.m.

Details

Message ID 20170928115012.47967-5-alice@linux.vnet.ibm.com
State New
Series "s390: Add support for GS and RI control blocks"
Headers show

Commit Message

alice Sept. 28, 2017, 11:50 a.m.
- Add GS and RI control blocks in test s390x_regs_check.c
 - Add new test "s390x_gs_threads" for GS with broadcast command for the
   s390_guarded_storage() system call.
 - Add new test "s390x_runtime_instr" to check if the RI control block is
   correctly restored when the RI is active.

The original test cases for GS and RI have been provided by
Martin Schwidefsky <schwidefsky@de.ibm.com>

Signed-off-by: Alice Frosi <alice@linux.vnet.ibm.com>
Reviewed-by: Michael Holzheu <holzheu@linux.vnet.ibm.com>
---
 test/zdtm/static/Makefile              |   5 +-
 test/zdtm/static/s390x_gs_threads.c    | 192 +++++++++++++++++++++++++++++
 test/zdtm/static/s390x_regs_check.c    |  78 ++++++++++++
 test/zdtm/static/s390x_runtime_instr.c | 212 +++++++++++++++++++++++++++++++++
 4 files changed, 486 insertions(+), 1 deletion(-)
 create mode 100644 test/zdtm/static/s390x_gs_threads.c
 create mode 100644 test/zdtm/static/s390x_runtime_instr.c

Patch hide | download patch | download mbox

diff --git a/test/zdtm/static/Makefile b/test/zdtm/static/Makefile
index 74ae02f..1c4e41f 100644
--- a/test/zdtm/static/Makefile
+++ b/test/zdtm/static/Makefile
@@ -204,7 +204,9 @@  endif
 endif
 
 ifeq ($(SRCARCH),s390)
-        TST_NOFILE += s390x_regs_check
+        TST_NOFILE +=	s390x_regs_check	\
+			s390x_gs_threads	\
+			s390x_runtime_instr
 endif
 
 TST_FILE	=				\
@@ -496,6 +498,7 @@  pidns03:		CFLAGS += -pthread
 pidns03:		LDFLAGS += -pthread
 
 s390x_regs_check:	LDFLAGS += -pthread
+s390x_gs_threads:	LDFLAGS += -pthread
 
 $(LIB):	force
 	$(Q) $(MAKE) -C $(LIBDIR)
diff --git a/test/zdtm/static/s390x_gs_threads.c b/test/zdtm/static/s390x_gs_threads.c
new file mode 100644
index 0000000..46cfd84
--- /dev/null
+++ b/test/zdtm/static/s390x_gs_threads.c
@@ -0,0 +1,192 @@ 
+#include <linux/types.h>
+#include <pthread.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/mman.h>
+#include <sys/syscall.h>
+#include <sys/wait.h>
+#include <unistd.h>
+
+#include "lock.h"
+#include "zdtmtst.h"
+
+#define NR_THREADS	4
+#define GS_ENABLE	0
+#define GS_SET_BC_CB	2
+#define GS_BROADCAST	4
+
+#ifndef __NR_guarded_storage
+#define __NR_guarded_storage   378
+#endif
+
+const char *test_doc = "Check the guarded storage broadcast";
+/* Original test provided by Martin Schwidefsky <schwidefsky@de.ibm.com> */
+const char *test_author = "Alice Frosi <alice@linux.vnet.ibm.com>";
+
+static unsigned long main_thread_tid;
+
+/*
+ * This test case executes the following procedure:
+ *
+ * 1) The parent thread creates NR_THREADS child threads
+ *
+ * 2) For each thread (including the parent thread):
+ *    - Enable guarded-storage
+ *    - Set the guarded-storage broadcast control block and
+ *      specify gs_handler as Guarded-Storage-Event Parameter-List
+ *      address
+ *
+ * 3) Dump and restore
+ *
+ * 4) Guarded-storage broadcast event
+ *    - Child threads: Wait until main thread does GS broadcast
+ *    - Parent thread: Trigger GS broadcast
+ *
+ * 5) Verify that all GS works as expected and all threads have been
+ *    executed the gs_handler
+ */
+
+struct gs_cb {
+	__u64 reserved;
+	__u64 gsd;
+	__u64 gssm;
+	__u64 gs_epl_a;
+};
+
+static futex_t futex;
+
+/*
+ * Load guarded-storage
+ */
+static inline unsigned long load_guarded(unsigned long *mem)
+{
+	unsigned long val;
+
+	asm volatile(".insn rxy,0xe3000000004c, %0,%1"
+		     : "=d" (val)
+		     : "m" (*mem)
+		     : "14", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7");
+	return val;
+}
+
+/*
+ * Inline assembly to deal with interrupted context to the call of
+ * the GS handler. Load guarded can be turned into a branch to this
+ * function.
+ */
+void gs_handler_asm(void);
+asm(
+	".globl gs_handler_asm\n"
+	"gs_handler_asm:\n"
+	"	lgr	%r14,%r15\n"
+	"	aghi	%r15,-320\n"
+	"	stmg	%r0,%r14,192(%r15)\n"
+	"	stg	%r14,312(%r14)\n"
+	"	la	%r2,160(%r15)\n"
+	"	.insn	rxy,0xe30000000049,0,160(%r15)\n"
+	"	lg	%r14,24(%r2)\n"
+	"	lg	%r14,40(%r14)\n"
+	"	la	%r14,6(%r14)\n"
+	"	stg	%r14,304(%r15)\n"
+	"	brasl	%r14,gs_handler\n"
+	"	lmg	%r0,%r15,192(%r15)\n"
+	"	br	%r14\n"
+	"	.size gs_handler_asm,.-gs_handler_asm\n");
+
+/*
+ * GS handler called when GS event occurs
+ */
+void gs_handler(struct gs_cb *this_cb)
+{
+	unsigned long tid = syscall(SYS_gettid);
+
+	test_msg("%d:gs_handler for thread %016lx\n", futex.raw, tid);
+	if (tid == main_thread_tid)
+		return;
+	futex_dec_and_wake(&futex);
+	exit(0);
+}
+
+/*
+ * Entry point for threads
+ */
+static void *thread_run(void *param)
+{
+	unsigned long test = 0x1234000000;
+	unsigned long *gs_epl;
+	struct gs_cb *gs_cb;
+
+	/* Enable guarded-storage */
+	if (syscall(__NR_guarded_storage, GS_ENABLE) != 0) {
+		fail("Unable to enable guarded storage");
+		exit(1);
+	}
+	gs_epl = malloc(sizeof(unsigned long) * 6);
+	gs_cb = malloc(sizeof(*gs_cb));
+	if (gs_epl == NULL || gs_cb == NULL) {
+		fail("Error allocating memory\n");
+		exit(1);
+	}
+	gs_cb->gsd = 0x1234000000UL | 26;
+	gs_cb->gssm = -1UL;
+	gs_cb->gs_epl_a = (unsigned long) gs_epl;
+	gs_epl[1] = (unsigned long) gs_handler_asm;
+	/* Set the GS broadcast control block */
+	syscall(__NR_guarded_storage, GS_SET_BC_CB, gs_cb);
+	futex_dec_and_wake(&futex);
+	/* Wait for all threads to set the GS broadcast control block */
+	futex_wait_until(&futex, 0);
+	test_msg("Thread %016lx staring loop\n",  syscall(SYS_gettid));
+	/*
+	 * Designate a guarded-storage section until the main task
+	 * performs the GS_BROADCAST action and the following load_guarded
+	 * will provoke the switch to the gs handler
+	 */
+	while (1)
+		load_guarded(&test);
+}
+
+int main(int argc, char *argv[])
+{
+	pthread_t tids[NR_THREADS];
+	int i;
+
+	main_thread_tid = syscall(SYS_gettid);
+	test_init(argc, argv);
+	/* Enable guarded-storage */
+	if (syscall(__NR_guarded_storage, GS_ENABLE) != 0) {
+		if (errno == ENOSYS) {
+			test_daemon();
+			test_waitsig();
+			skip("No guarded storage support");
+			pass();
+			return 0;
+		}
+		fail("Unable to enable guarded storage");
+		return 1;
+	}
+
+	futex_set(&futex, NR_THREADS);
+
+	for (i = 0; i < NR_THREADS; i++)
+		pthread_create(tids + i, NULL, thread_run, NULL);
+
+	test_msg("Waiting for thread startup\n");
+	/* Wait for all threads to set the GS broadcast control block */
+	futex_wait_until(&futex, 0);
+
+	test_daemon();
+	test_waitsig();
+
+	test_msg("Doing broadcast\n");
+	/*
+	 * Triggers a GS event and force all the threads to execute
+	 * the gs handler
+	 */
+	syscall(__NR_guarded_storage, GS_BROADCAST);
+
+	test_msg("Waiting for thread completion\n");
+	futex_set(&futex, NR_THREADS);
+	pass();
+	return 0;
+}
diff --git a/test/zdtm/static/s390x_regs_check.c b/test/zdtm/static/s390x_regs_check.c
index 1a7e841..85d0a2c 100644
--- a/test/zdtm/static/s390x_regs_check.c
+++ b/test/zdtm/static/s390x_regs_check.c
@@ -183,12 +183,89 @@  struct reg_set reg_set_vxrs_high = {
 };
 
 /*
+ * s390 guarded-storage registers
+ */
+#define NT_S390_GS_CB		0x30b
+#define NT_S390_GS_BC		0x30c
+
+struct gs_cb {
+	uint64_t regs[4];
+};
+
+struct gs_cb gs_cb_data = {
+	.regs = {
+		0x0000000000000000,
+		0x000000123400001a,
+		0x5555555555555555,
+		0x000000014b58a010,
+	}
+};
+
+struct reg_set reg_set_gs_cb = {
+	.name		= "GS_CB",
+	.nr		= NT_S390_GS_CB,
+	.data		= &gs_cb_data,
+	.len		= sizeof(gs_cb_data),
+	.optional	= true,
+};
+
+struct gs_cb gs_bc_data = {
+	.regs = {
+		0x0000000000000000,
+		0x000000123400001a,
+		0xffffffffffffffff,
+		0x0000000aaaaaaaaa,
+	}
+};
+
+struct reg_set reg_set_gs_bc = {
+	.name		= "GS_BC_CB",
+	.nr		= NT_S390_GS_BC,
+	.data		= &gs_bc_data,
+	.len		= sizeof(gs_bc_data),
+	.optional	= true,
+};
+
+/*
+ * s390 runtime-instrumentation control block
+ */
+#define NT_S390_RI_CB		0x30d
+
+struct ri_cb {
+	uint64_t regs[8];
+};
+
+struct ri_cb ri_cb_data = {
+	.regs = {
+			0x000002aa13aae000,
+			0x000002aa13aad000,
+			0x000002aa13aadfff,
+			0xe0a1000400000000,
+			0x0000000000000000,
+			0x0000000000004e20,
+			0x0000000000003479,
+			0x0000000000000000,
+	}
+};
+
+struct reg_set reg_set_ri_cb = {
+	.name		= "RI_CB",
+	.nr		= NT_S390_RI_CB,
+	.data		= &ri_cb_data,
+	.len		= sizeof(ri_cb_data),
+	.optional	= true,
+};
+
+/*
  * Vector with all regsets
  */
 struct reg_set *reg_set_vec[] = {
 	&reg_set_prfpreg,
 	&reg_set_vxrs_low,
 	&reg_set_vxrs_high,
+	&reg_set_gs_cb,
+	&reg_set_gs_bc,
+	&reg_set_ri_cb,
 	NULL,
 };
 
@@ -246,6 +323,7 @@  static int set_regset(pid_t pid, struct reg_set *reg_set)
 	}
 	if (reg_set->optional) {
 		switch (errno) {
+		case EOPNOTSUPP:
 		case ENODEV:
 			test_msg(" REGSET: %12s -> not supported by machine\n",
 				 reg_set->name);
diff --git a/test/zdtm/static/s390x_runtime_instr.c b/test/zdtm/static/s390x_runtime_instr.c
new file mode 100644
index 0000000..6be32c3
--- /dev/null
+++ b/test/zdtm/static/s390x_runtime_instr.c
@@ -0,0 +1,212 @@ 
+#include <stdio.h>
+#include <unistd.h>
+#include <signal.h>
+#include <sys/types.h>
+#include <unistd.h>
+#include <sys/syscall.h>
+#include <errno.h>
+#include <sys/ptrace.h>
+#include <stdlib.h>
+#include <sys/uio.h>
+#include <asm/ptrace.h>
+#include <linux/elf.h>
+#include <sys/wait.h>
+#include <stdlib.h>
+#include <ucontext.h>
+#include <signal.h>
+#include <string.h>
+
+#include "zdtmtst.h"
+
+#ifndef __NR_s390_runtime_instr
+#define __NR_s390_runtime_instr		342
+#endif
+#define NT_S390_RI_CB			0x30d
+
+#define BUF_SIZE (1024*1024)
+
+const char *test_doc	= "Check runtime-instrumentation";
+/* Original test provided by Martin Schwidefsky <schwidefsky@de.ibm.com> */
+const char *test_author	= "Alice Frosi <alice@linux.vnet.ibm.com>";
+
+struct runtime_instr_cb {
+	unsigned long rca;
+	unsigned long roa;
+	unsigned long rla;
+
+	unsigned int v			: 1;
+	unsigned int s			: 1;
+	unsigned int k			: 1;
+	unsigned int h			: 1;
+	unsigned int a			: 1;
+	unsigned int reserved1		: 3;
+	unsigned int ps		: 1;
+	unsigned int qs		: 1;
+	unsigned int pc		: 1;
+	unsigned int qc		: 1;
+	unsigned int reserved2		: 1;
+	unsigned int g			: 1;
+	unsigned int u			: 1;
+	unsigned int l			: 1;
+	unsigned int key		: 4;
+	unsigned int reserved3		: 8;
+	unsigned int t			: 1;
+	unsigned int rgs		: 3;
+
+	unsigned int m			: 4;
+	unsigned int n			: 1;
+	unsigned int mae		: 1;
+	unsigned int reserved4		: 2;
+	unsigned int c			: 1;
+	unsigned int r			: 1;
+	unsigned int b			: 1;
+	unsigned int j			: 1;
+	unsigned int e			: 1;
+	unsigned int x			: 1;
+	unsigned int reserved5		: 2;
+	unsigned int bpxn		: 1;
+	unsigned int bpxt		: 1;
+	unsigned int bpti		: 1;
+	unsigned int bpni		: 1;
+	unsigned int reserved6		: 2;
+
+	unsigned int d			: 1;
+	unsigned int f			: 1;
+	unsigned int ic		: 4;
+	unsigned int dc		: 4;
+
+	unsigned long reserved7;
+	unsigned long sf;
+	unsigned long rsic;
+	unsigned long reserved8;
+};
+
+/*
+ * Return PSW mask
+ */
+static inline unsigned long extract_psw(void)
+{
+	unsigned int reg1, reg2;
+
+	asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
+	return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
+}
+
+/*
+ * Enable runtime-instrumentation
+ */
+static inline void rion(void)
+{
+	asm volatile (".word 0xaa01, 0x0000");
+}
+
+/*
+ * Disable runtime-instrumentation
+ */
+static inline void rioff(void)
+{
+	asm volatile (".word 0xaa03, 0x0000");
+}
+
+/*
+ * Modify the current runtime-instrumentation control block
+ */
+static inline void mric(struct runtime_instr_cb *cb)
+{
+	asm volatile(".insn rsy,0xeb0000000062,0,0,%0" : : "Q" (*cb));
+}
+
+/*
+ * Store the current runtime-instrumentation control block
+ */
+static inline void stric(struct runtime_instr_cb *cb)
+{
+	asm volatile(".insn rsy,0xeb0000000061,0,0,%0" : "=Q" (*cb) : : "cc");
+}
+
+/*
+ * Ensure that runtime-intstrumentation is still working after C/R
+ */
+int main(int argc, char **argv)
+{
+	struct runtime_instr_cb ricb, ricb_check;
+	unsigned long *ricb_check_ptr = (unsigned long *) &ricb_check;
+	unsigned long *ricb_ptr = (unsigned long *) &ricb;
+	unsigned long psw_mask;
+	void *buf;
+	int i;
+
+	test_init(argc, argv);
+	buf = malloc(BUF_SIZE);
+	memset(buf, 0, BUF_SIZE);
+	memset(&ricb, 0, sizeof(ricb));
+	/* Initialize the default RI control block in the kernel */
+	if (syscall(__NR_s390_runtime_instr, 1, NULL) < 0) {
+		if (errno == EOPNOTSUPP) {
+			test_daemon();
+			test_waitsig();
+			skip("RI not supported");
+			pass();
+			return 0;
+		}
+		fail("Fail with error %d", errno);
+		return -1;
+	}
+	/* Set buffer for RI */
+	ricb.rca = ricb.roa = (unsigned long) buf;
+	ricb.rla = (unsigned long) buf + BUF_SIZE;
+	mric(&ricb);
+	/* Enable RI - afterwards the PSW will have RI bit set */
+	rion();
+	psw_mask = extract_psw();
+	/* Verify that the RI bit is set in the PSW */
+	if (!(psw_mask & PSW_MASK_RI)) {
+		fail("Failed to enable RI");
+		return -1;
+	}
+	/* Collect RI records until we hit buffer-full condition */
+	while (ricb.rca < ricb.rla + 1) {
+		for (i = 0; i < 10000; i++)
+			asm volatile("" : : : "memory");
+		rioff();
+		stric(&ricb);
+		rion();
+	}
+	/* Disable RI */
+	rioff();
+	/* Save the current RI control block */
+	stric(&ricb);
+	ricb_check = ricb;
+	/* Re-enable RI for checkpoint */
+	rion();
+
+	/* Do C/R now */
+	test_daemon();
+	test_waitsig();
+
+	/* Verify that the RI bit is set in the PSW */
+	psw_mask = extract_psw();
+	if (!(psw_mask & PSW_MASK_RI)) {
+		fail("RI bit in PSW not set");
+		return -1;
+	}
+	/*
+	 * Verify that the RI block has been restored correctly
+	 * and the buffer is unchanged
+	 */
+	rioff();
+	stric(&ricb);
+	for (i = 0; i < 8; i++) {
+		if (ricb_ptr[i] == ricb_check_ptr[i])
+			continue;
+		/* Skip sf field because its value may change */
+		if (i == 6)
+			continue;
+		fail("%d:Got %016lx expected %016lx",
+		     i, ricb_ptr[i], ricb_check_ptr[i]);
+		return -1;
+	}
+
+	pass();
+	return 0;
+}