[03/18] x86: cpu -- Add image definitions for fpu frames

Submitted by Cyrill Gorcunov on July 19, 2018, 12:47 p.m.

Details

Message ID 20180719124746.7546-4-gorcunov@gmail.com
State Accepted
Series "x86: Add support for extendable fpu frames"
Headers show

Commit Message

Cyrill Gorcunov July 19, 2018, 12:47 p.m.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
---
 images/core-x86.proto | 21 +++++++++++++++++++++
 images/cpuinfo.proto  |  2 ++
 2 files changed, 23 insertions(+)

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diff --git a/images/core-x86.proto b/images/core-x86.proto
index d4b791dbcd73..2ed2ad35d9a8 100644
--- a/images/core-x86.proto
+++ b/images/core-x86.proto
@@ -40,8 +40,29 @@  message user_x86_regs_entry {
 }
 
 message user_x86_xsave_entry {
+	/* standart xsave features */
 	required uint64			xstate_bv	=  1;
+
+	/* AVX components: 16x 256-bit ymm registers, hi 128 bits */
 	repeated uint32			ymmh_space	=  2;
+
+	/* MPX components */
+	repeated uint64			bndreg_state	=  3;
+	repeated uint64			bndcsr_state	=  4;
+
+	/* AVX512 components: k0-k7, ZMM_Hi256, Hi16_ZMM  */
+	repeated uint64			opmask_reg	=  5;
+	repeated uint64			zmm_upper	=  6;
+	repeated uint64			hi16_zmm	=  7;
+
+	/* Protected keys */
+	repeated uint32			pkru		=  8;
+
+	/*
+	 * Processor trace (PT) and hardware duty cycling (HDC)
+	 * are supervisor state components and only managed by
+	 * xsaves/xrstors on cpl=0, so ignore them.
+	 */
 }
 
 message user_x86_fpregs_entry {
diff --git a/images/cpuinfo.proto b/images/cpuinfo.proto
index a8cb8de34635..b399503bdb48 100644
--- a/images/cpuinfo.proto
+++ b/images/cpuinfo.proto
@@ -15,6 +15,8 @@  message cpuinfo_x86_entry {
 	repeated uint32			capability	= 6;
 
 	optional string			model_id	= 7;
+
+	optional uint64			xfeatures_mask	= 8;
 }
 
 message cpuinfo_ppc64_entry {

Comments

Dmitry Safonov July 25, 2018, 7:12 p.m.
2018-07-19 13:47 GMT+01:00 Cyrill Gorcunov <gorcunov@gmail.com>:
> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>

Reviewed-by: Dmitry Safonov <0x7f454c46@gmail.com>

Thanks,
             Dmitry