fix tlsdesc asm on arm with hard float abi

Submitted by Szabolcs Nagy on Oct. 7, 2018, 7:09 p.m.

Details

Message ID 20181007190907.GP10209@port70.net
State New
Series "fix tlsdesc asm on arm with hard float abi"
Headers show

Commit Message

Szabolcs Nagy Oct. 7, 2018, 7:09 p.m.
for me this fixes

src/ldso/arm/tlsdesc.S: Assembler messages:
src/ldso/arm/tlsdesc.S:54: Error: selected processor does not support `vpush {d0-d7}' in ARM mode
src/ldso/arm/tlsdesc.S:61: Error: selected processor does not support `vpop {d0-d7}' in ARM mode

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From 5a7ee1904c33f97bcb47ec6d729f399ae8036b4d Mon Sep 17 00:00:00 2001
From: Szabolcs Nagy <nsz@port70.net>
Date: Sun, 7 Oct 2018 18:31:43 +0000
Subject: [PATCH] fix tlsdesc asm on arm with hard float abi

gcc does not always pass flags to the assembler to indicate the fpu settings,
instead it just adds .fpu directives to the generated asm, so in handwritten
asm we have to do the same (the same approach is used in setjmp.s already).
---
 src/ldso/arm/tlsdesc.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/ldso/arm/tlsdesc.S b/src/ldso/arm/tlsdesc.S
index b81f3111..b8c54aae 100644
--- a/src/ldso/arm/tlsdesc.S
+++ b/src/ldso/arm/tlsdesc.S
@@ -51,14 +51,18 @@  __tlsdesc_dynamic:
 
 3:
 #if __ARM_PCS_VFP || !__SOFTFP__
+	.fpu vfp
 	vpush {d0-d7}
+	.fpu softvfp
 #endif
 	push {r0-r3}
 	add r0,sp,#4
 	bl __tls_get_new
 	pop {r1-r3,ip}
 #if __ARM_PCS_VFP || !__SOFTFP__
+	.fpu vfp
 	vpop {d0-d7}
+	.fpu softvfp
 #endif
 	sub r0,r0,r1    // r0 = retval-tp
 	b 4b
-- 
2.18.0